SoC Boot-Up Timing Analysis using ARM System Trace Macrocell
This webinar focuses on the profiling of a boot-up process on Cortex-A bases System-On-Chips (SoCs), starting from 1st stage bootloaders until the startup of a Linux kernel; how the ARM System Trace Macrocell (STM) can be utilized for tracing a boot process distributed across multiple cores, e.g. Cortex-R7 boot core and Cortex-A53 application cores.
- 2:59 Agenda and motivation
- 5:04 Introduction to ARM System Trace Macrocell (STM)
- 7:06 Introduction to SoC Boot-up Process (R-Car M3)
- 9:24 Bootloader Instrumentation demo
- 20:19 winIDEA Analyzer Configuration
- 22:07 Two ways of winIDEA Trace Analyzer STM Configuration (XML file and GUI method)
- 23:00 winIDEA Trace Analyzer STM Configuration - GUI method
- 25:11 Trace Recording and results 25:52 Conclusion
- 27:47 Answers and Questions
We empower embedded software engineers to do it right!
Our BlueBox Technology stands for fast and easy microcontroller access via any kind of debug interface. Complemented with integrated development and test software winIDEA/testIDEA it provides access to on-target timing information. Embedded software engineers can review application timing, analyze real-time operating system states, and undertake code coverage to prove that their products do what they were built to do.
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