Please enable JavaScript to view this site.

winIDEA Help

Version: 9.21.161

ARM Cortex

The information provided in this chapter is intended to be used together with the CPU reference manual provided by the silicon vendor. This chapter assumes knowledge of the CPU functionality and the terminology and concepts defined and explained in the CPU reference manual. Basic knowledge of winIDEA is also necessary. This chapter deals with specifics and advanced details and it is not meant as a basic or introductory text.

 

 

  • Setup - General settings to prepare winIDEA for debug session.
  • Flash programming - Additional configuration settings for internal Flash programming.
  • Debug - Access breakpoints, virtual memory access, breakpoints Wizard.
  • Analyzer - Trace, Profiler and Coverage.
  • Knowledge Base - Specific problems solved.

 

 

Getting started

 

 

Debug features

  • JTAG and SWD debug protocol
  • Hardware execution breakpoints
  • Unlimited software breakpoints
  • Hardware data access breakpoints
  • FLASH programming
  • Multi-core support
  • Real-time memory access
  • Little and big-endian support
  • Exception catching
  • Hot Attach
  • Stopping peripherals (e.g. TIMERs) when stopped (CPU dependent)
  • On-Chip Trace support
  • Parallel, SWO, ETB and MTB trace supported (CPU dependent)

 

 

 

Debug connectors

Not all debug protocol, trace protocol and debug connector combinations are possible. Debug Protocol is available unrelated to the used connector. Following table lists available trace protocols regarding to chosen Debug Protocol and Debug Adapter.

 

 

Debug Adapter

ARM CoreSight 20-pin

ARM CoreSight 10-pin

ARM-JTAG 20-pin

 

Debug Protocol

JTAG

cJTAG

ETB

MTB

PARALLEL

ETF

ETR

ETB

MTB

ETF

ETR

ETB

MTB

ETF

ETR

SWD

SWO

ETB

MTB

PARALLEL

ETF

ETR

SWO

ETB

MTB

ETF

ETR

SWO

ETB

MTB

ETF

ETR

 

 

bulb

More resources

hmtoggle_arrow0 Documentation from ARM.

 

Copyright© iSYSTEM AG Carl-Zeiss-Str.1 85247 Schwabhausen Germany