This chapter explains Renesas RL78 specific options for Flash manipulation. For general configuration and options explanation, visit Storage device programming chapter.
RL78 microcontrollers have internal program flash, which is programmed through the standard debug download. The debugger identifies which code from the download file fits in the program and then programs it accordingly. Flash programming related setting is Erase FLASH before download in the Hardware / CPU Options / SoC.
RL78 has also built a proprietary EEPROM emulation software layer, which is managed by Renesas FSL libraries, on top of the data flash. Direct access to the EEPROM emulation through the debugger is not supported.
Some flash regions are reserved by the emulator, therefore, the application should be linked in a manner that does not use these regions.
Beside of BFA’s monitor that is already programmed into the chip, emulation requires additional monitors which are loaded to user’s flash area.
Reserved memory locations:
•0x00002 - 0x00003
•0x000CE - 0x000D7
Monitor code is always loaded to the last block of internal flash and uses 6 bytes of user stack.
Two different monitors can be loaded:
•0x100 flash locations at the end of program flash if real-time access is disabled
•0x200 flash locations at the end of program flash if real-time access is enabled
Reset vector at 0x00000-0x00001 is redirected to monitor, therefore, Debug / Verify Download reports error.