Microchip ARM Cortex-M4
Microchip's (formerly Atmel) range of ARM®Cortex®-M4 microcontrollers deliver up to 120MHz of high performance processing, plenty of memory and miniature packaging options, making them idea for a range of applications where connectivity plays an important role. The SAM4N family is ideal for generic microcontroller applications that require basic digital and analog interfaces. They also feature peripherals to support motor control with their QDEC interface and low-power support.
The SAM4S family offer scalable performance and security with their dual-bank flash and a range of hardware code protection and scrambled external bus interface. These devices are also touch-ready, offering native support for the QTouch® capacitive touch technology. The SAM4L deliver a low-power 90µA/MHz, translating to an impressive CoreMark/mA of 28.0 at 12MHz. With support for segmented LCD displays, this makes them ideal for battery-powered embedded applications.
Both debug and instrumented trace support are provided on these devices via ARM's CoreSight™ technology, utilizing the Serial Wire Debug (SWD) interface for pure debugging and the Serial Wire Output (SWO) single-pin interface for basic trace output. The Embedded Trace Macrocell (ETM) provides real-time output of program trace data, delivering more insight into application functionality during development and debugging.
Furthermore, the following CoreSight™ features are supported by this family:
| CoreSight™ Feature | Description | SAM4N | SAM4S | SAM4L | iC5000 | iC5700 |
| FPB (Flash Patch Breakpoint) | Implements hardware breakpoints | ✔ | ✔ | ✔ | ✔ | ✔ |
| DWT (Data Watchpoint and Trace) | Hardware comparators for program counter and data watchpoints |
✔ | ✔ | ✔ | ✔ | ✔ |
| ITM (Instrumentation Trace Macrocell) | Block supports printf style debugging, trace of RTOS events and output of diagnostic system information. |
✔ | ✔ | ✔ | ✔ | ✔ |
| ETM (Embedded Trace Macrocell) | 5-pin output for ITM or ETM trace messages | ✘ | ✘ | ✘ | ✔ | ✔ |
| ETB (Embedded Trace Buffer) | Reserves SRAM to store trace information on-chip | ✘ | ✘ | ✘ | ✔ | ✔ |
| SWO (Serial Wire Output) | Single-pin output for ITM trace messages | ✔ | ✔ | ✔ | ✔ | ✔ |
| TPIU (Trace Port Interface Unit) | Bridge between on-chip trace data and either SWO or ETM interfaces. |
✔ | ✔ | ✔ | ✔ | ✔ |
| SWD (Serial Wire Debug) | Two-wire CoreSight™ interface used for debugging and debug configuration. |
✔ | ✔ | ✔ | ✔ | ✔ |
If you are looking to improve code quality, our integrated testing tool testIDEA can also utilize the debug interface to test your code on the target microcontroller as well.