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STM32H7: Flash Configuration
The STM32H7 family also has special Flash Configuration Field.
Parallelism - The parallelism is the maximum number of bits that can be written to ‘0’ in one shot during a write operation.
LATENCY - To correctly read data from Flash memory, the number of wait states (LATENCY) must be correctly programmed in the Flash access control register (FLASH_ACR) according to the frequency of the bus clock (aclk) and the internal voltage range of the device VCORE.
WRHIGHFREQ - The user must therefore trim the optimal programming delay through the WRHIGHFREQ parameter in the FLASH_ACR register.
