winIDEA HelpMulti-core Synchronization
In this topic:
Multi-core Synchronization can be achieved:
•Automatically
•Manually
For suspending peripheral devices refer to this chapter.
Automatic Configuration
Multiple cores are hardware-wise not synchronized by default after reset. Synchronization can be optionally enabled by winIDEA. The option is ON by default.
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Open Hardware | CPU Options | Debugging. |
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Make sure option Synchronize selected cores (stop/run) when possible is checked. |
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Check the Hardware | CPU Options | Cores | <Core> | Synchronize this core option. |
Make sure this option is checked for all cores you want to be a part of synchronization.
Manual configuration
Synchronization can be achieved via a winIDEA configuration dialog of the on-chip OCDS module. For more information, refer to the OCDS chapter of the TriCore user manual. Open Hardware | SoC Debug Module.
Trigger Lines TL1-TL7
TriCore devices have internal 7 trigger lines to where Break, Suspend or Trigger Events from Cores, MCDS (trace) or Trigger Pins can be connected.
TL1 Suspend Targets
Simplified view of the Trigger line 1, which is used to suspend Targets.
CPUs
Each core has SUSIN, BRKIN, BRKOUT and HALT signals. For each core you can specify to which trigger line these signals are connected.
HSM / MCDS
Specify to which trigger line these signals are connected
