SoC Advanced
Open the Hardware | CPU Options | SoC Advanced page.
Reset
Microcontrollers from the MPC57xx series can have two reset signals connected (in the target) to the debug JTAG connector or the debug Aurora connector. Nexus Mictor38 connector has one reset signal only. Beside the default RESET line (JTAG connector - pin 9), optionally “Power on reset” line can be connected (JTAG connector - pin 8) to the target debug connector. When both reset lines are connected and have to be driven by the debugger, select the ‘Power on Reset’ for e200 Reset selection. When ‘RESET’ setting is selected the debugger drives only default RESET line.
Assume Invariant MMU in iTest mode
MMU refresh consumes considerable amount of time, but is required for correct debugging.
winIDEA test SDK operations however can be accelerated considerable if MMU configuration is considered to be preserved by a test execution. The option is unchecked by default.
Use cached MMU configuration for RT memory access
Check this option to enable real-time memory access.
When a core transitions from a stopped state to an active state, its MMU settings are typically re-read. If enabled, your system uses instead the MMU configuration that was in place when the core last stopped (not recommended).
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Changes in MMU configuration while the core is running will be reflected after the core stops. |
Custom Init RAM Range
When debug session is established winIDEA initializes the minimal supported size of RAM for the applicable family of devices. If your device offers more RAM then enable this option and specify the RAM start address and size. winIDEA will then initialize all RAM in this range. Large RAM ranges may take a while to initialize. Choose fastest possible JTAG communication speed to speed up the process.
Chorus HSM Low-power debug workaround
Try enabling this option when using with Low-power debug and have HSM enabled on Chorus devices.
