Open Hardware / CPU Options / SoC Advanced page.
If checked winIDEA attempts to protect high-end RH850/F1H, F1KM/F1KH and P1x-C devices from getting permanently locked. This protection can be optionally turned off in the dialog window.
Control booting the cores in the F1KM/F1KH devices. Set the option to debug all cores after RESET, even if ICUM is enabled. If not checked when ICUM is enabled, PE cores wait to be enabled by the ICUM.
Another option to control booting the cores in the F1KM/F1KH devices. The ICUM is started automatically on debug-reset startup. After ICUM code enables PE cores, the SoC will stop altogether. The PEs will be at their respective reset vectors.
If the option Disable fast Real-time access is checked, the memory is accessed through MAU instead of Sampling RAM.
Supported in RH850 G3, 1st generation RH850, RH850/x1x SoCs. Not supported on RH850G4, 2nd generation RH850, RH850/x2x SoCs.
In some cases a scripted FP5 Query could fail if debug-mode entry is performed. Right before the debug entry the user code will run for a couple of 10s of milliseconds, configure the PLL and a subsequent FP5 connection may fail.
The option should also be used for reconfiguring devices that are fresh from the factory as they are usually preset for JTAG debug connection, which is not supported. FP5 Query will set the device to LPD4 debug port. Note, this option will be reset the next time the workspace is opened.
1. Turn on the BlueBox.
2. Power-cycle the CPU.
3. Enable Force FP5 Query before debug entry.
4. Perform CPU Reset command.
More information available in the in-line help as well.
Note that Debug-boot all cores and Auto Start options are mutually exclusive and should not be used at the same time.
Checked Auto start all observed cores option enables automatically start of all observed cores on debug entry (via BOOTCTRL register). If this option is not set, secondary cores are not started automatically, so the customer's application needs to start them. The option is enabled by default.