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Version: 9.21.253

Configure Cortex-M: DWT Exception Trace

In this topic:

Enabling DWT Exception Trace

Enable ITM




The Data & Watchpoint Trace (DWT) module of a Cortex-M processor can be enabled to generate dedicated Exception Trace messages. The output can be on the currently selected trace port, e.g. a parallel trace port or via the Serial Wire Output (SWO) pin.


When enabled the DWT generates an Exception trace message when any of the following occurs:

The processor enters an exception handler, from Thread mode or by preemption of a thread or handler.  

The processor exits an exception handler with an EXC_RETURN vector.  

The processor returns from an exception, re-entering a preempted thread or handler code sequence.


Typical use cases are:

Exception Occurrence Analysis

Exception (Over-) Load Analysis

Low Trace Bandwidth Requirement (only Entry/Exit of Exceptions)




The application must generates exceptions, such as a period timer interrupt.



Enabling DWT Exception Trace


Create a  Manual Trace Configuration |



Check Manual Trigger/Recorder configuration and press Configure.



Check Enabled in the DWT CORE0 page.



Check Enable exception trace (generate packets on exception entry and exit) option in the DWT CORE0 page.






Enable ITM


Open the ITM page and enable the ITM.



Begin a New Analyzer Session.






Visualize data in the Profiler Timeline and Statistics window

To display DWT Exception trace in the Profiler Timeline and Statistics window a new Data Profiler Area has to be created.

Make sure Profiler option is checked in the Hardware page / Analysis and Configuration section of the Analyzer Configuration dialog.



Open the ITM page and enable the ITM.



Begin a New Analyzer Session.




Enable Profiler





Create a new Data Area

1.Open Profiler page.

2.Click New / Trace in the Data Areas section to open Profiler Data Area dialog.

3.Make sure Data is enabled in the Profile section.

4.Select Special from the drop-down menu.

5.Select DWT_Exceptions.

6.Confirm and start a New Analyzer Session.



Results are displayed in the Profiler Timeline and in the Statistics window.


In this example the ExternalInterrupt_0x40 represents the OS tick interrupt. It generates a CPU load of about 0.44%. The OS also performs some Supervisor Calls (SVCall).

The normal program execution ends here due to the occurrence of a BusFault exception.



DWT Exception trace with ETM instruction trace and DWT data trace

The DWT Exception trace can also be used in conjunction with the ETM instruction trace and DWT data trace.

Click to enlarge

From the DWT Exception trace message, the Profiler can derive the exception number and thus the type of exception, either core-internal exceptions 1 to 15, or core-external interrupts, i.e. interrupt requests from the NVIC.  


Please also refer to ARM documentation for more information on Exception handling of Cortex-M processors.

Click to enlarge


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