In this topic:
It’s possible to configure hardware breakpoints as access breakpoints on up to 8 individual addresses or up to 4 address ranges. Access type (RD, WR, RD/WR, Instruction) and Event Action can be selected for each access breakpoint. On the right of the dialog, click on the "..." button for opening the Comparator dialog.
In the Comparator dialog, different actions can be configured for individual Trigger Event register. Default configuration stops the core only.
The following options:
•Event associated (EVTA)
•CDC Suspend-Out Signal State (SUSP)
•Break-Out Disable (BOD)
only apply to TriCore V1.6 & V1.6x. For TriCore V1.8, use the same-named options from the Hardware / CPU Options / SoC Events dialog.
Enabled - Enable/Disable the selected Trigger Event register.
This option is available only for TriCore V1.8.
Disabled - The event is disabled and no actions occur: the suspend-out signal and performance counter control ignore the event
None - No action is implemented through the EVTA field of the event’s register however the suspend-out signal and performance count still occur as normal for an event.
Halt - The Debug Action Halt, causes the Halt mode to be entered where no more instructions are fetched or executed. While halted, the CPU does not respond to any interrupts.
Breakpoint Trap - The Breakpoint Trap enters a Debug Monitor without using any user resource. Refer to TriCore Architecture manual for more details.
Breakpoint Interrupt - One of the possible Debug Actions to be taken on a Debug Event, is to raise a Breakpoint Interrupt. The interrupt priority is programmable and is defined in the control register associated with the breakpoint interrupt. Refer to TriCore Architecture manual for more details.
CDC Suspend-Out Signal State (SUSP) - The suspend-out signal is asserted when a debug event occurs. It is up to the user then to configure according peripheral module to act upon asserted suspend-out signal.
Break-Out Disable (BOD) - When this option is checked, BRKOUT signal is not asserted. This takes priority over any assertion generated by the EVTA field.
Break Before Make (BBM) - When this option is checked, the EVTA is taken at the exact instruction that generated a match. If unchecked, the EVTA is taken after the instruction that has generated a match is retired.
When the performance counter is operating in task mode, the counters are started and stopped by debug actions. All event registers allow the counters to either be started or stopped.
The trigger event registers also allow the mode to be toggled to active (start) or inactive (stop). This allows a single Range Table Entry (RTE) to be used to control the performance counter in certain applications.
There is a simple Breakpoint Wizard available which allows you to configure the hardware breakpoint either as an execution breakpoint or data access breakpoint.