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import vlab
import os
import dataclasses
import argparse
 
 
@dataclasses.dataclass
class CmdArgs():
  elf_file_path: str
 
  @staticmethod
  def parse() -> "CmdArgs":
      parser = argparse.ArgumentParser()
      parser.add_argument("--elf_file_path", required=True, help="Path to elf file to be loaded in TC39xB/CPU0")
 
      return CmdArgs(**vars(parser.parse_args()))
 
cmdArgs = CmdArgs.parse()
 
# Add TC3xx Simulator to vlab path
vlab.path.append(os.environ["VLAB_PATH"])
 
# This just creates global variables for complete path of cpu0..5
# cpu0 = "TC39xB/CPU0"
# cpu1 = "TC39xB/CPU1"
# ...
tc39xb = "TC39xB"
cpu_list = []
for cpu_num in range(6):
  cpu_var_val = f"{tc39xb}/CPU{cpu_num}"
  globals()[f"cpu{cpu_num}"] = cpu_var_val
  cpu_list.append(cpu_var_val)
hsm = f"{tc39xb}/HSM_CORE"
 
 
print("\nElaborating TC3xx platform\n")
sim = vlab.Simulator()
sim.simulation_port = 9701
sim.elaborate("AURIX TC39xB")
 
# Get address space for stubbing
addr_space_probes = []
for cpu in cpu_list:
  addr_space_probes.append(sim.address_space(f"{cpu}/virtual"))
 
# Load images into CPU memory
print("Loading elf into memory\n")
elf_file = addr_space_probes[0].load_elf(cmdArgs.elf_file_path, set_start_address = True)
 
# Wait for external debugger to attach
sim.wait_for_attach()
sim.run()