Analyzer Operation mode
In this topic:
•None
•PCIe
Operation mode is based on your CPU and target design. Before you can continue to Trace Configuration, you have to:
1. Determine what trace technology is available on your target.
2. Define the Operation mode via Hardware | CPU Options | Analyzer.
Read the Trace Technologies chapter for more information on different trace technologies supported by the BlueBox Technology and the limitations they might impose.
Additional hardware settings regarding the trace port are available in Hardware | CPU Options, depending on the CPU architecture you are using. |
Ideally you want to have a Trace Port available, which means that your MCU needs to have an on-chip trace logic which supports it. The trace module needs to be connected to pins on your CPU package and these signals need to be routed to the debug connector which is connected to the BlueBox. In this case select the Trace Port analyzer operation mode.
Even if your device does not have a trace port, it might still be able to record trace to an On-Chip Trace Buffer. In this case you can select the SoC Analyzer Operation mode.
Depending on the CPU architecture it might be possible to obtain timing information in form of CPU-generated timestamps. These timestamps represent the number of cycles since the trace session was started and is later converted to time by BlueBox tools. To do so, BlueBox tools need to know what is the Cycle duration of one clock cycle used by the on-chip trace logic.
You can read out the MCDS cycle duration in the AURIX plugin.
In some cases the device does not have any on-chip trace logic, but features special instructions with which it is possible to instrument the application (such as DBTAG and PUSH on RH850). These instructions generate special messages on the debug channel, which can be recorded by BlueBox tools. In this case select SFT Software Trace Analyzer Operation mode.
When the type of a trace from a SoC trace sources is determined from further selection in the SoC specific settings.
Capture trace data output through PCIe (Peripheral Component Interconnect Express). Currently supported for ARM Cortex ETR Trace capture method.
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