Cypress Traveo II
This chapter describes specific use cases for Cypres Traveo devices debug initilization.
Use these scripts (<device>_DebugFreezeEnable.cpp) for a better synched Run/Stop mechanism. Supported on the following devices:
These scripts use CTM/CTI Channel 2 and should not be used together with the Trace Cross Trigger Channel CTM/CTI, because they may interfere with trace.
A warning is added to the Progress window: Warning! Disable this initialization script if trace is used. Debug freeze trigger shares the CTM channel 2 with the Trace trigger.
For more information about the configuration follow Custom Configuration.
By default Traveo II device requires debug interface operating at frequency higher than 1.5 MHz. This permits the debugger to execute the necessary debug initialization procedures fast enough and within the device start up time window constraint, after the CPU reset line is released by the BlueBox.
When debug interface:
While connecting to the CPU, winIDEA reports a warning if the debug interface frequency is not configured properly.
When the application is properly linked and programmed into the FLASH, the CPU stops after reset at the address to which the reset vector points to. If FLASH contains no valid code (e.g. empty device), the CPU stops in boot code.
1. Open Hardware menu / CPU Options / SoC page.
2. Select the SWD Debug Protocol.
3. Set the SWD clock to 1500 kHz or higher and confirm.
4. Open the JTAG page.
4. Set JTAG Debug Protocol to 1500 kHz or higher and confirm.
winIDEA enables alternate debug session initialization if issues with downloading occur. It will only affect the download operations.
1. Follow Custom Configuration procedure.
2. Select "1" in altProgInit field.
Cypress Traveo II packages have different trace capabilities. For the 64-pin, 80-pin and 100-pin packages Emulation Adapter Cypress Traveo II CYT2B9 and Emulation Adapter Cypress Traveo II CYT2B7 provide the trace interfaces, where trace port is not available or lacks the full trace capability.
Read more about trace port configuration in the chapter about Cortex-M Specific use cases (Cypress Traveo II).